Re: CAT definition in the scenario xmls

Minggui Cao

Hi, for CAT support (L2/L3), you can check it by cpuid;


For L2, if on core platform it is private for a physical core,  L3/LLC is shared between cores, if hyper-threading is not enabled, L2 CAT not helpful.


L2/L3 CAT use different MSR to set, so no matter the cache ways the same or not.


You can refer ACRN: release_2.5 branch, the tgl-rvp board industry scenario has L3 CAT setting.



From: acrn-users@... <acrn-users@...> On Behalf Of jordan.nowak22@...
Sent: Tuesday, March 29, 2022 11:02 PM
To: acrn-users@...
Subject: [acrn-users] CAT definition in the scenario xmls


Hi ACRN experts,

based on this guide
I see that L2 cache is enabled for CAT but i'm not sure on the L3/LLC, how about for platforms that have different number of cacheways for L2 and L3, what's the right way to enable CAT for L3/LLC in the scenario xmls? 

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