Tool doesn't generate I/O address. User needs to save twice, then the tool generates I/O address. I change the save function into async function， and improved the promise chaining， now it can be respo

In order to improve DX, 'DISABLED' style configurator settings are changed to 'ENABLED' style. The config xml files need too be changed accordingly. Including: - MCE_ON_PSC_DISABLED -> MCE_ON_PSC_ENAB

In order to improve DX, 'DISABLED' style configurator settings are changed to 'ENABLED' style. - MCE_ON_PSC_DISABLED -> MCE_ON_PSC_ENABLED - ENFORCE_TURNOFF_AC -> AC_ENABLED Tracked-On: #7661 Signed-o

Some configurator settings are defined as 'feature DISABLED' style, which could cause confusion to developers. This patch is to change them into straightforward 'ENABLED' style. Including: - MCE_ON_PS

BVT schedule rule: When a new thread is wakeup and added to runqueue, it will get the smallest avt (svt) from runqueue to initiate its avt. If the svt is smaller than it's avt, it will keep the origin

From: Chenli Wei <chenli.wei@...> The current ACRN-Configurator allow user add duplicate PCI devices to passthrough which it is not correct. This patch add an assert to check the duplicate of PCI devi

BVT schedule rule: When a new thread is wakeup and added to runqueue, it will get the smallest avt (svt) from runqueue to initiate its avt. If the svt is smaller than it's avt, it will keep the origin

Found errors when import xml file through this bug report, after fix the clos mask could import correctly, and show the clos mask bar in the view correctly, and also save clos mask data correctly. Sig

From: Chenli Wei <chenli.wei@...> The current ACRN-Configurator allow user add duplicate PCI devices to passthrough which it is not correct. This patch add an assert to check the duplicate of PCI devi

From: Chenli Wei <chenli.wei@...> The current ACRN-Configurator allow user add duplicate PCI devices to passthrough which it is not correct. This patch add an assert to check the duplicate of PCI devi

BVT schedule rule: When a new thread is wakeup and added to runqueue, it will get the smallest avt (svt) from runqueue to initiate its avt. If the svt is smaller than it's avt, it will keep the origin

On some platforms the L3 CAT capabilities are not reported via CPUID even though they are present. The public real-time tuning guide suggests to try accessing the MSRs directly to detect if L3 CAT is

The MSR reading and writing routines today has the following issues: 1. The missing of /dev/cpu/*/msr is not properly captured as it is reported via FileNotFoundError rather than IOError. 2. The wrmsr

In v3.0 the msrfield class has its initializer changed in a way that is incompatible with the parameter names or the getter/setter. When introduced from the BITS project, that class allows specifying

Some Intel platforms are known to be equipped with L3 CAT while they do not report its presence or parameters via the architectural CPUID interface. The public real-time tuning guide for 11th gen Core

BVT schedule rule: When a new thread is wakeup and added to runqueue, it will get the smallest avt (svt) from runqueue to initiate its avt. If the svt is smaller than it's avt, it will keep the origin

fix VM duplicate name when create new VM Signed-off-by: Chuang-Ke <chuangx.ke@...> Tracked-On: #7920 --- .../configurator/packages/configurator/src/pages/Config.vue | 2 +- 1 file changed, 1 insertion(

From: Chenli Wei <chenli.wei@...> The current launch script allocate bdf for ivshmem by itself and have not get bdf from scenario. This patch refine the above logic and generate slot by user settings.

From d16ae3186184d82cb286e662cd3e467ae13539c4 Mon Sep 17 00:00:00 2001 From: zihengL1 <ziheng.li@...> Date: Fri, 29 Jul 2022 09:19:14 +0800 Subject: [PATCH] config-tools: solve hv and vm memory addres

add tooltips for cpu affinity and tiny fix for virtio console device. Tracked-On: #7933 Signed-off-by: Kunhui-Li <kunhuix.li@...> --- .../CustomWidget/Virtio/Console.vue | 2 +- .../ConfigForm/CustomWi