[PATCH 0/3] Add Timed GPIO passthrough

Junjie Mao

-----Original Message-----
From: Wei, Chenli <chenli.wei@...>
Sent: Tuesday, October 18, 2022 3:12 PM
To: Dong, Eddie <eddie.dong@...>; acrn-dev@...; Wang, Yu1
<yu1.wang@...>; Mao, Junjie <junjie.mao@...>
Subject: 回复: [acrn-dev] [PATCH 0/3] Add Timed GPIO passthrough

发件人: Dong, Eddie <eddie.dong@...>
发送时间: Tuesday, October 18, 2022 5:55 AM
收件人: acrn-dev@...; Wang, Yu1 <yu1.wang@...>;
Mao, Junjie <junjie.mao@...>
抄送: Wei, Chenli <chenli.wei@...>
主题: RE: [acrn-dev] [PATCH 0/3] Add Timed GPIO passthrough

Traditionally, we support passthru of PCIe devices. Later on, we added the
capability to passthru certain range of MMIO registers to a guest in the
granularity of 4KB.

It seems this patch want to add the capability of passthru certain MMIO
registers without at the granularity of 4KB.

In this case, I have questions how we can handle the other registers inside
same 4KB page? I assume we should let SOS VM handle them. I didn't see
this in this patch.
Secondary, I am wondering the need of this capability. Let the DM of SOS
VM to handle the GPIO registers is much clean, though slower. But I
thought the performance issue is not the focus here.

If we really want to passthru part MMIo registers to a VM, we need to 1)
make sure the entire 4KB pages are owned by SOS VM initially, 2) the
assignment should come from SOS VM, not pre-configuration, 3) No any
interrupt, nor DMA --- Question: how can we check this?

" Let the DM of SOS VM to handle the GPIO registers is much clean, though slower.
But I thought the performance issue is not the focus here."

----Yes, if there is no performance issue, we could use DM to handle it. I will check the
performance request with FIS team.
Performance could be an issue due to the nature of the Timed GPIO (tGPIO). A typical use is programming a timestamp and an action (such as assert / deassert) one control cycle before the action is to be conducted when that timestamp equals the ART counter. The period of control cycles could range from 125us to 1ms.

Thus, accesses to tGPIO do have latency requirement. Intercepting such accesses in the hypervisor, which may take up to 10us, could be acceptible depending on the buffer time within each control cycle, while emulation in DM can suffer from a higher, unbearable latency.

More concrete numbers are to be collected by evaluation.

The check list:
"1) make sure the entire 4KB pages are owned by SOS VM initially "

----The TGPIO registers are part of the PMC MMIO register page, I will add an schema
check or assert to check this.

"2) the assignment should come from SOS VM, not pre-configuration "

----For the offline tool, we just add a checkbox which user could enable or disable the
TGPIO passthrough, but have not export any details, the
assignment of TGPIO was done by the usage of create VM.
I think the point is that assignment of tGPIO should not be encoded in any form in the hypervisor. We can collect user's intention of tGPIO in the configurator, but that should only impact the device model parameters.

“3) No any interrupt, nor DMA”

----For TGPIO, no interrupt and DMA.
We can check the nature of tGPIO manually for this specific case, but the underlying mechanism, i.e., registering I/O handlers for granting accesses to a sub-page region, can hardly be aware of that.

Perhaps we can check if there is any possibility for the board inspector to collect usages of interrupts and DMA for a specific device. Such info can be used to filter out devices that should not be given to any other VM.

Best Regards
Junjie Mao

-----Original Message-----
From: acrn-dev@... <acrn-dev@...>
Behalf Of chenli.wei
Sent: Friday, October 14, 2022 7:25 AM
To: Wang, Yu1 <yu1.wang@...>; Mao, Junjie
Cc: Wei, Chenli <chenli.wei@...>
Subject: [acrn-dev] [PATCH 0/3] Add Timed GPIO passthrough

From: Chenli Wei <chenli.wei@...>

This series patches add Timed GPIO passthrough feature for post-

1 HV patch, add a handler to process the Timed GPIO register.
2 DM patch, add a parameter and create ACPI table for post-launched VM.
3 Misc patch, add an element for user to enable or disable the Timed

Chenli Wei (3):
hv: add Timed GPIO process handler
misc: add element to config Timed GPIO
dm: add Timed GPIO parameter

devicemodel/Makefile | 1 +
devicemodel/core/main.c | 7 ++
devicemodel/hw/platform/acpi/acpi.c | 4 +
devicemodel/hw/platform/tgpio.c | 82 ++++++++++++++++++
devicemodel/include/tgpio.h | 24 ++++++
hypervisor/Makefile | 1 +
hypervisor/arch/x86/guest/vm.c | 4 +
hypervisor/dm/vtgpio.c | 84 +++++++++++++++++++
hypervisor/include/arch/x86/asm/vm_config.h | 2 +
hypervisor/include/dm/vtgpio.h | 12 +++
misc/config_tools/schema/config.xsd | 5 ++
.../xforms/vm_configurations.c.xsl | 13 +++
12 files changed, 239 insertions(+)
create mode 100644 devicemodel/hw/platform/tgpio.c create mode
devicemodel/include/tgpio.h create mode 100644
create mode 100644 hypervisor/include/dm/vtgpio.h