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Re: [PATCH] HV:[v2] fix potential memory leak in 'vlapic_create()'
Acked-by: Anthony Xu <anthony.xu@...>
Can you add comment for calloc?
If the size >= 4K, it is 4k aligned.
Anthony
Acked-by: Anthony Xu <anthony.xu@...>
Can you add comment for calloc?
If the size >= 4K, it is 4k aligned.
Anthony
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By
Xu, Anthony
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#10816
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Re: [PATCH] hv: pirq: use a bitmap to maintain irq use status
Acked-by: Anthony Xu <anthony.xu@...>
Acked-by: Anthony Xu <anthony.xu@...>
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By
Xu, Anthony
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#10815
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[PATCH] hv: pirq: use a bitmap to maintain irq use status
This commit replaces the "used" field of irq_desc with a bitmap to maintain
the irq use status to save memory and LOC, and improve the efficiency as well.
Signed-off-by: Yan, Like
This commit replaces the "used" field of irq_desc with a bitmap to maintain
the irq use status to save memory and LOC, and improve the efficiency as well.
Signed-off-by: Yan, Like
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By
Yan, Like
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#10814
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Re: [PATCH] HV:[v2] fix potential memory leak in 'vlapic_create()'
LGTM.
Thanks.
By
Li, Fei1
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#10813
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Re: [PATCH] hv: vtd: use EPT as translation table for PTDev in SOS
LGTM.
With a minor comment below
Could we just define them as uint8_t ?
please add blank between "==".
Thanks.
LGTM.
With a minor comment below
Could we just define them as uint8_t ?
please add blank between "==".
Thanks.
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By
Li, Fei1
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#10812
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[PATCH] hv: vtd: use EPT as translation table for PTDev in SOS
In current code, the address translation type for passthrough devices
in SOS is passthrough type, which means the device in SOS can access
the whole physcial memory.
This patch uses SOS EPT to
In current code, the address translation type for passthrough devices
in SOS is passthrough type, which means the device in SOS can access
the whole physcial memory.
This patch uses SOS EPT to
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By
Wu, Binbin
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#10811
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[PATCH v3] drm/i915/gvt: ensure each pipe has a plane in Host OS
This is a workaround patch to fix black screen issue and pass plane
restriction tests. Weston 4.0 won't enable the CRTCs which doesn't have
a primary plane. So explicitly check `avail_planes_per_pipe`
This is a workaround patch to fix black screen issue and pass plane
restriction tests. Weston 4.0 won't enable the CRTCs which doesn't have
a primary plane. So explicitly check `avail_planes_per_pipe`
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By
Xinyun Liu
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#10810
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[PATCH 3/3] hv: add hypercall to setup init context of vm
DM will use this hypercall to setup the UOS boot context like
segment selector/base, rip etc.
We add init_ctx as one item of arch related vm structure. It will
be initialized for:
- none-UEFI VM0:
DM will use this hypercall to setup the UOS boot context like
segment selector/base, rip etc.
We add init_ctx as one item of arch related vm structure. It will
be initialized for:
- none-UEFI VM0:
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By
Yin, Fengwei <fengwei.yin@...>
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#10809
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[PATCH 2/3] hv: make struct boot_ctx suitable for hypercall
- Adjust the fields sequence to make each fields aligned by nature.
- Add prefox acrn_
- Move cpu_gp_regs to public head file
- Fix build error for UEFI platform
Signed-off-by: Yin Fengwei
- Adjust the fields sequence to make each fields aligned by nature.
- Add prefox acrn_
- Move cpu_gp_regs to public head file
- Fix build error for UEFI platform
Signed-off-by: Yin Fengwei
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By
Yin, Fengwei <fengwei.yin@...>
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#10808
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[PATCH 1/3] hv: move vm0_boot_context from assembly code to c code
The vm0_boot_context definition in assembly code is not completely
compatible with C definition.
Move it from assembly code to C code.
Signed-off-by: Yin Fengwei <fengwei.yin@...>
---
The vm0_boot_context definition in assembly code is not completely
compatible with C definition.
Move it from assembly code to C code.
Signed-off-by: Yin Fengwei <fengwei.yin@...>
---
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By
Yin, Fengwei <fengwei.yin@...>
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#10807
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[PATCH 0/3] add hypercall to setup boot context
To make the info passed from DM to guest transparent to
hypervisor, we will exporse the API to let DM could
setup the UOS bsp registers.
Now, we have boot context (some vcpu registers) for SOS.
We
To make the info passed from DM to guest transparent to
hypervisor, we will exporse the API to let DM could
setup the UOS bsp registers.
Now, we have boot context (some vcpu registers) for SOS.
We
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By
Yin, Fengwei <fengwei.yin@...>
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#10806
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[PATCH] hv: treewide: fix 'Function prototype/defn param type mismatch'
Fix the parameter type mismatch between API declaration and definition.
Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@...>
---
hypervisor/arch/x86/guest/vlapic.c | 8
Fix the parameter type mismatch between API declaration and definition.
Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@...>
---
hypervisor/arch/x86/guest/vlapic.c | 8
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By
Shiqing Gao
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#10805
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Re: [PATCH v2] drm/i915/gvt: ensure each pipe has a plane in Host OS
I found some warnings reported by checkpatch.pl, please run it by yourself.
I found some warnings reported by checkpatch.pl, please run it by yourself.
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By
He, Min <min.he@...>
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#10804
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Re: [PATCH v2] drm/i915/gvt: ensure each pipe has a plane in Host OS
LGTM
Reviewd-by: Fei Jiang <fei.jiang@...>
LGTM
Reviewd-by: Fei Jiang <fei.jiang@...>
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By
Fei Jiang
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#10803
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[PATCH] HV:[v2] fix potential memory leak in 'vlapic_create()'
- should free allocated memory in case of registering
mmio handler failure.
v2:
- update 'apic_page' field in 'struct acrn_vlapic',
from pointer type to 'struct lapic_regs'
- should free allocated memory in case of registering
mmio handler failure.
v2:
- update 'apic_page' field in 'struct acrn_vlapic',
from pointer type to 'struct lapic_regs'
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By
Yonghua Huang
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#10802
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[PATCH] hv:fixed MISRA-C return value violatons
From: Mingqiang Chi <mingqiang.chi@...>
-- change send_start_ipi/do_copy_earlylog to void type
-- drop the return value for vcpu_queue_execption
when inject GP/PF/UD/AC/SS
Signed-off-by:
From: Mingqiang Chi <mingqiang.chi@...>
-- change send_start_ipi/do_copy_earlylog to void type
-- drop the return value for vcpu_queue_execption
when inject GP/PF/UD/AC/SS
Signed-off-by:
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By
Mingqiang Chi
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#10801
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[PATCH v2] drm/i915/gvt: ensure each pipe has a plane in Host OS
This is a workaround patch to fix black screen issue and pass plane
restriction tests. Weston 4.0 won't enable the CRTCs which doesn't have
a primary plane. So explicitly check `avail_planes_per_pipe`
This is a workaround patch to fix black screen issue and pass plane
restriction tests. Weston 4.0 won't enable the CRTCs which doesn't have
a primary plane. So explicitly check `avail_planes_per_pipe`
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By
Xinyun Liu
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#10800
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Re: [PATCH] drm/i915/gvt: ensure each pipe has a plane in Host OS
Good catch. Thanks! Will improve the check.
Good catch. Thanks! Will improve the check.
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By
Xinyun Liu
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#10799
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Re: [PATCH 3/3] hv: debug: add the hypervisor NPK log
By
Zhi Jin
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#10798
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ACRN Project Technical Community Meeting: @ Weekly 9PM-10PM (China-Shanghai), 6AM-7AM (US-West Coast), 3PM-4PM (Europe-London)
Agenda (8/22): ACRN S3/S5 Management
WWTopicPresentatorStatusWW21ACRN roadmap introductionRen, JackDoneWW22Patch submission process
ACRN feature list introductionWang, Hongbo
Ren, jackDoneWW23Memory
Agenda (8/22): ACRN S3/S5 Management
WWTopicPresentatorStatusWW21ACRN roadmap introductionRen, JackDoneWW22Patch submission process
ACRN feature list introductionWang, Hongbo
Ren, jackDoneWW23Memory
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By
Wang, Hongbo
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#10797
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