Re: [PATCH 2/2] ACRN:DM:VGPU: Add more standard modes for EDID block


Yu Wang
 

Acked-by: Wang, Yu1 <yu1.wang@...>

On Fri, May 06, 2022 at 11:39:25AM +0800, Zhao Yakui wrote:
EDID uses the bytes of 38-53 to support up to 8 standard modes. And it is
based on the mechanism: Byte 0 defines the xres / 8 - 31 and byte 1 defines
the aspect_ratio/refresh_rate.
But now it uses the incorrect logic in course of adding standard mode, which
causes that no standard mode is added in EDID block.

Fix it and add another two standard modes so that the guest_vm can parse
more modes from EDID.

Signed-off-by: Zhao Yakui <yakui.zhao@...>
---
devicemodel/hw/vdisplay_sdl.c | 11 +++++++----
1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/devicemodel/hw/vdisplay_sdl.c b/devicemodel/hw/vdisplay_sdl.c
index 02b8a6de1..eeefec17b 100644
--- a/devicemodel/hw/vdisplay_sdl.c
+++ b/devicemodel/hw/vdisplay_sdl.c
@@ -105,6 +105,7 @@ static const struct timing_entry {
uint32_t byte_t3;// byte idx in the Established Timings III Descriptor
uint32_t bit; // bit idx
uint8_t hz; // frequency
+ bool is_std; // the flag of standard mode
} timings[] = {
/* Established Timings I & II (all @ 60Hz) */
{ .hpixel = 1024, .vpixel = 768, .byte = 36, .bit = 3, .hz = 60},
@@ -112,8 +113,10 @@ static const struct timing_entry {
{ .hpixel = 640, .vpixel = 480, .byte = 35, .bit = 5, .hz = 60 },

/* Standard Timings */
- { .hpixel = 1920, .vpixel = 1080, .hz = 60 },
- { .hpixel = 1280, .vpixel = 720, .hz = 60 },
+ { .hpixel = 1920, .vpixel = 1080, .hz = 60, .is_std = true },
+ { .hpixel = 1280, .vpixel = 720, .hz = 60, .is_std = true },
+ { .hpixel = 1440, .vpixel = 900, .hz = 60, .is_std = true },
+ { .hpixel = 1680, .vpixel = 1050, .hz = 60, .is_std = true },
};

typedef struct frame_param{
@@ -269,7 +272,7 @@ vdpy_edid_set_timing(uint8_t *addr, const base_param *b_param, TIMING_MODE mode)
return;
}
case STDT: // Standard Timings
- if(stdcnt < 8 && (timing->hpixel == b_param->h_pixel)) {
+ if(stdcnt < 8 && timing->is_std) {
hpixel = (timing->hpixel >> 3) - 31;
if (timing->hpixel == 0 ||
timing->vpixel == 0) {
@@ -304,7 +307,7 @@ vdpy_edid_set_timing(uint8_t *addr, const base_param *b_param, TIMING_MODE mode)
}
break;
} else {
- return;
+ continue;
}

default:
--
2.25.1

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