[PATCH v3] misc: refine cache config


chenli.wei
 

The current RDT setting requires users to calculate the CLOS mask and
the details, it is not a user-friendly setting.

So we redesigned RDT, users can easily specify the cache of each vcpu
for VMs.

This patch add an RDT region element for schema, calculate and generate
all the mask and rdt parameters by config tool to generates rdt_info
struct for board.c.

v2-->v3:
1. code format
2. adapt new RDT interface

v1-->v2:
1. update commit msg
2. modify for rdt struct update
3. use new cache interface of board.xml

TODO:
1. unified allocate CLOS ID for L2 and L3

Signed-off-by: Chenli Wei <chenli.wei@...>
---
misc/config_tools/board_config/board_c.py | 253 ++++++++++++++----
misc/config_tools/library/common.py | 6 +
misc/config_tools/schema/config.xsd | 5 +
misc/config_tools/schema/types.xsd | 48 +++-
misc/config_tools/static_allocators/clos.py | 54 ++++
misc/config_tools/xforms/lib.xsl | 4 +-
misc/config_tools/xforms/misc_cfg.h.xsl | 6 -
.../xforms/vm_configurations.c.xsl | 14 +-
8 files changed, 311 insertions(+), 79 deletions(-)
create mode 100644 misc/config_tools/static_allocators/clos.py

diff --git a/misc/config_tools/board_config/board_c.py b/misc/config_tools/board_config/board_c.py
index 971b31785..a3938de59 100644
--- a/misc/config_tools/board_config/board_c.py
+++ b/misc/config_tools/board_config/board_c.py
@@ -7,6 +7,7 @@ import sys
import enum
import board_cfg_lib
import common
+import lxml.etree

class RDT(enum.Enum):
L2 = 0
@@ -17,6 +18,7 @@ INCLUDE_HEADER = """
#include <asm/board.h>
#include <asm/vtd.h>
#include <asm/msr.h>
+#include <asm/rdt.h>
#include <pci.h>
#include <misc_cfg.h>
"""
@@ -102,9 +104,7 @@ def populate_clos_mask_msr(rdt_res, cat_mask_list, config):
idx = 0
for cat_mask in cat_mask_list:
print("\t{", file=config)
- print("\t\t.value.clos_mask = CLOS_MASK_{},".format(idx), file=config)
- print("\t\t.msr_index = MSR_IA32_{0}_MASK_BASE + {1},".format(
- rdt_res, idx), file=config)
+ print("\t\t.clos_mask = {},".format(cat_mask), file=config)
print("\t},", file=config)
idx += 1

@@ -118,58 +118,136 @@ def populate_mba_delay_mask(rdt_res, mba_delay_list, config):
idx = 0
for mba_delay_mask in mba_delay_list:
print("\t{", file=config)
- print("\t\t.value.mba_delay = MBA_MASK_{},".format(idx), file=config)
- print("\t\t.msr_index = MSR_IA32_{0}_MASK_BASE + {1},".format(
- rdt_res, idx), file=config)
+ print("\t\t.mba_delay = ,".format(mba_delay_mask), file=config)
print("\t},", file=config)
idx += 1

+def get_rdt_enabled():
+ scenario_etree = lxml.etree.parse(common.SCENARIO_INFO_FILE)
+ enable = scenario_etree.xpath(f"//RDT_ENABLED/text()")
+ if enable[0] == "y":
+ return "true"
+ else:
+ return "false"

-def gen_rdt_res(config):
- """
- Get RDT resource (L2, L3, MBA) information
- :param config: it is a file pointer of board information for writing to
- """
+def get_cdp_enabled():
+ scenario_etree = lxml.etree.parse(common.SCENARIO_INFO_FILE)
+ enable = scenario_etree.xpath(f"//CDP_ENABLED/text()")
+ if enable[0] == "y":
+ return "true"
+ else:
+ return "false"
+
+def get_common_clos_max(clos_number, capability_id):
+
+ common_clos_max = 0
+ if get_rdt_enabled() and not get_cdp_enabled():
+ common_clos_max = clos_number
+ if get_cdp_enabled() and capability_id != 'MBA':
+ common_clos_max = clos_number / 2
+
+ return common_clos_max
+
+def gen_rdt_str(cache, config):
err_dic = {}
- rdt_res_str =""
- res_present = [0, 0, 0]
- (rdt_resources, rdt_res_clos_max, _) = board_cfg_lib.clos_info_parser(common.BOARD_INFO_FILE)
- common_clos_max = board_cfg_lib.get_common_clos_max()
+ cat_mask_list = {}

- cat_mask_list = common.get_hv_item_tag(common.SCENARIO_INFO_FILE, "FEATURES", "RDT", "CLOS_MASK")
- mba_delay_list = common.get_hv_item_tag(common.SCENARIO_INFO_FILE, "FEATURES", "RDT", "MBA_DELAY")
+ board_etree = lxml.etree.parse(common.BOARD_INFO_FILE)
+ mask_length = common.get_node(f"./capability[@id='CAT']/capacity_mask_length/text()", cache)
+ clos_number = common.get_node(f"./capability[@id='CAT']/clos_number/text()", cache)

- if common_clos_max > MSR_IA32_L2_MASK_END - MSR_IA32_L2_MASK_BASE or\
- common_clos_max > MSR_IA32_L3_MASK_END - MSR_IA32_L3_MASK_BASE:
- err_dic["board config: generate board.c failed"] = "CLOS MAX should be less than reserved adress region length of L2/L3 cache"
- return err_dic
+ bitmask = (1 << int(mask_length)) - 1
+ cache_level = common.get_node(f"./@level", cache)
+ cache_id = common.get_node(f"./@id", cache)
+ core_list = board_etree.xpath(f"//cache[@level = '{cache_level}' and @id = '{cache_id}']/processors/processor/text()")
+ capability_list = board_etree.xpath(f"//cache[@level = '{cache_level}' and @id = '{cache_id}']/capability/@id")

- print("\n#ifdef CONFIG_RDT_ENABLED", file=config)
- if len(rdt_resources) == 0 or common_clos_max == 0:
- print("struct platform_clos_info platform_{0}_clos_array[MAX_CACHE_CLOS_NUM_ENTRIES];".format("l2"), file=config)
- print("struct platform_clos_info platform_{0}_clos_array[MAX_CACHE_CLOS_NUM_ENTRIES];".format("l3"), file=config)
- print("struct platform_clos_info platform_{0}_clos_array[MAX_MBA_CLOS_NUM_ENTRIES];".format("mba"), file=config)
+ for capability_id in capability_list:
+
+ common_clos_max = get_common_clos_max(int(clos_number), capability_id)
+ if capability_id == "CAT":
+ if common_clos_max > MSR_IA32_L2_MASK_END - MSR_IA32_L2_MASK_BASE or\
+ common_clos_max > MSR_IA32_L3_MASK_END - MSR_IA32_L3_MASK_BASE:
+ err_dic["board config: Failed to generate board.c"] = "CLOS Mask Number is more then the reserved address region length of L2/L3 cache"
+ return err_dic
+
+ cdp_enable = get_cdp_enabled()
+ cat_mask_list = common.get_mask_list(cache_level, cache_id)
+ if len(cat_mask_list) > int(clos_number):
+ err_dic['board config: Failed to generate board.c'] = "CLOS Mask Number too bigger then the supported of L2/L3 cache"
+ return err_dic;
+
+ if cache_level == "2":
+ rdt_res = "l2"
+ elif cache_level == "3":
+ rdt_res = "l3"
+
+ clos_config_array = "platform_l{0}_clos_array_{1}".format(cache_level, int(cache_id, 16))
+
+ print("\t{", file=config)
+ print("\t\t.res.cache = {", file=config)
+ print("\t\t\t.bitmask = {0},".format(hex(bitmask)), file=config)
+ print("\t\t\t.cbm_len = {0},".format(mask_length), file=config)
+ print("\t\t\t.is_cdp_enabled = {0},".format(cdp_enable), file=config)
+ print("\t\t},", file=config)
+ elif capability_id == "MBA":
+ max_throttling_value = common.get_node(f"./capability/max_throttling_value/text()", cache)
+ rdt_res = "mba"
+ clos_config_array = "platform_mba_clos_array"
+ print("\t{", file=config)
+ print("\t\t.res.membw = {", file=config)
+ print("\t\t\t.mba_max = {0},".format(clos_number), file=config)
+ print("\t\t\t.delay_linear = {0}".format(max_throttling_value), file=config)
+ print("\t\t},", file=config)
+
+ print("\t\t.num_closids = {0},".format(clos_number), file=config)
+ print("\t\t.num_clos_config = {0},".format(len(cat_mask_list)), file=config)
+ print("\t\t.clos_config_array = {0},".format(clos_config_array), file=config)
+
+ cpu_mask = 0
+ for mask in core_list:
+ cpu_mask = cpu_mask | int(mask, 16)
+ print("\t\t.cpu_mask = {0},".format(hex(cpu_mask)), file=config)
+ print("\t},", file=config)
+
+ return err_dic;
+
+def gen_clos_array(cache_list, config):
+ err_dic = {}
+ res_present = [0, 0, 0]
+ if len(cache_list) == 0:
+ print("union clos_config platform_{0}_clos_array[MAX_CACHE_CLOS_NUM_ENTRIES];".format("l2"), file=config)
+ print("union clos_config platform_{0}_clos_array[MAX_CACHE_CLOS_NUM_ENTRIES];".format("l3"), file=config)
+ print("union clos_config platform_{0}_clos_array[MAX_MBA_CLOS_NUM_ENTRIES];".format("mba"), file=config)
+ print("struct rdt_info res_infos[RDT_INFO_NUMBER];", file=config)
else:
- for idx, rdt_res in enumerate(rdt_resources):
- if rdt_res == "L2":
- rdt_res_str = "l2"
- print("struct platform_clos_info platform_{0}_clos_array[{1}] = {{".format(rdt_res_str,
- "MAX_CACHE_CLOS_NUM_ENTRIES"), file=config)
- populate_clos_mask_msr(rdt_res, cat_mask_list, config)
+ for idx, cache in enumerate(cache_list):
+ cache_level = common.get_node(f"./@level", cache)
+ cache_id = common.get_node(f"./@id", cache)
+ clos_number = common.get_node(f"./capability/clos_number/text()", cache)
+ if cache_level == "2":
+
+ cat_mask_list = common.get_mask_list(cache_level, cache_id)
+ array_size = len(cat_mask_list)
+
+ print("union clos_config platform_l2_clos_array_{0}[{1}] = {{".format(int(cache_id, 16), clos_number), file=config)
+
+ populate_clos_mask_msr("L2", cat_mask_list, config)
+
print("};\n", file=config)
- res_present[RDT.L2.value] = 1
- elif rdt_res == "L3":
- rdt_res_str = "l3"
- print("struct platform_clos_info platform_{0}_clos_array[{1}] = {{".format(rdt_res_str,
- "MAX_CACHE_CLOS_NUM_ENTRIES"), file=config)
- populate_clos_mask_msr(rdt_res, cat_mask_list, config)
+ res_present[RDT.L2.value] += 1
+ elif cache_level == "3":
+ cat_mask_list = common.get_mask_list(cache_level, cache_id)
+
+ print("union clos_config platform_l3_clos_array_{0}[{1}] = {{".format(int(cache_id, 16), clos_number), file=config)
+
+ populate_clos_mask_msr("L3", cat_mask_list, config)
+
print("};\n", file=config)
- res_present[RDT.L3.value] = 1
- elif rdt_res == "MBA":
- rdt_res_str = "mba"
- print("struct platform_clos_info platform_{0}_clos_array[{1}] = {{".format(rdt_res_str,
- "MAX_MBA_CLOS_NUM_ENTRIES"), file=config)
- err_dic = populate_mba_delay_mask(rdt_res, mba_delay_list, config)
+ res_present[RDT.L3.value] += 1
+ elif cache_level == "MBA":
+ print("union clos_config platform_mba_clos_array[MAX_MBA_CLOS_NUM_ENTRIES] = {", file=config)
+ err_dic = populate_mba_delay_mask("mba", mba_delay_list, config)
print("};\n", file=config)
res_present[RDT.MBA.value] = 1
else:
@@ -177,17 +255,92 @@ def gen_rdt_res(config):
return err_dic

if res_present[RDT.L2.value] == 0:
- print("struct platform_clos_info platform_{0}_clos_array[{1}];".format("l2", "MAX_CACHE_CLOS_NUM_ENTRIES"), file=config)
+ print("union clos_config platform_l2_clos_array[MAX_CACHE_CLOS_NUM_ENTRIES];", file=config)
if res_present[RDT.L3.value] == 0:
- print("struct platform_clos_info platform_{0}_clos_array[{1}];".format("l3", "MAX_CACHE_CLOS_NUM_ENTRIES"), file=config)
+ print("union clos_config platform_l3_clos_array[MAX_CACHE_CLOS_NUM_ENTRIES];", file=config)
if res_present[RDT.MBA.value] == 0:
- print("struct platform_clos_info platform_{0}_clos_array[{1}];".format("mba", "MAX_MBA_CLOS_NUM_ENTRIES"), file=config)
+ print("union clos_config platform_mba_clos_array[MAX_MBA_CLOS_NUM_ENTRIES];", file=config)
+ return 0

- print("#endif", file=config)
+def gen_rdt_res(config):
+ """
+ Get RDT resource (L2, L3, MBA) information
+ :param config: it is a file pointer of board information for writing to
+ """
+ print("\n#ifdef CONFIG_RDT_ENABLED", file=config)
+ err_dic = {}
+ res_present = [0, 0, 0]

- print("", file=config)
- return err_dic
+ scenario_etree = lxml.etree.parse(common.SCENARIO_INFO_FILE)
+ allocation_etree = lxml.etree.parse(common.SCENARIO_INFO_FILE)
+ board_etree = lxml.etree.parse(common.BOARD_INFO_FILE)
+
+ cache_list = board_etree.xpath(f"//cache[capability/@id = 'CAT' or capability/@id = 'MBA']")
+ gen_clos_array(cache_list, config)
+
+ cache_list = board_etree.xpath(f"//cache[capability/@id = 'CAT' and @level = '2']")
+ if len(cache_list) > 0:
+ res_present[RDT.L2.value] = len(cache_list)
+ rdt_ins_name = "rdt_ins_l2[" + str(len(cache_list)) + "] = {"
+ print("struct rdt_ins {}".format(rdt_ins_name), file=config)
+ for idx, cache in enumerate(cache_list):
+ err_dic = gen_rdt_str(cache, config)
+ if err_dic:
+ return err_dic;
+ print("};\n", file=config)
+
+ cache_list = board_etree.xpath(f"//cache[capability/@id = 'CAT' and @level = '3']")
+ if len(cache_list) > 0:
+ res_present[RDT.L3.value] = len(cache_list)
+ rdt_ins_name = "rdt_ins_l3[" + str(len(cache_list)) + "] = {"
+ print("struct rdt_ins {}".format(rdt_ins_name), file=config)
+ for idx, cache in enumerate(cache_list):
+ err_dic = gen_rdt_str(cache, config)
+ if err_dic:
+ return err_dic;
+ print("};\n", file=config)
+
+ cache_list = board_etree.xpath(f"//cache[capability/@id = 'MBA']")
+ if len(cache_list) > 0:
+ res_present[RDT.L2.value] = 1
+ rdt_ins_name = "rdt_ins_mba[" + str(len(cache_list)) + "] = {"
+ print("struct rdt_ins {}".format(rdt_ins_name), file=config)
+ for idx, cache in enumerate(cache_list):
+ err_dic = gen_rdt_str(cache, config)
+ if err_dic:
+ return err_dic;
+ print("};\n", file=config)
+
+ print("struct rdt_type res_cap_info[RDT_NUM_RESOURCES] = {", file=config)
+ if res_present[RDT.L2.value] > 0:
+ print("\t{", file=config)
+ print("\t\t.res_id = RDT_RESID_L2,", file=config)
+ print("\t\t.msr_qos_cfg = MSR_IA32_L2_QOS_CFG,", file=config)
+ print("\t\t.msr_base = MSR_IA32_L2_MASK_BASE,", file=config)
+ print("\t\t.num_ins = {},".format(res_present[RDT.L2.value]), file=config)
+ print("\t\t.ins_array = rdt_ins_l2,", file=config)
+ print("\t},", file=config)
+ if res_present[RDT.L3.value] > 0:
+ print("\t{", file=config)
+ print("\t\t.res_id = RDT_RESID_L3,", file=config)
+ print("\t\t.msr_qos_cfg = MSR_IA32_L3_QOS_CFG,", file=config)
+ print("\t\t.msr_base = MSR_IA32_L3_MASK_BASE,", file=config)
+ print("\t\t.num_ins = {},".format(res_present[RDT.L3.value]), file=config)
+ print("\t\t.ins_array = rdt_ins_l3,", file=config)
+ print("\t},", file=config)
+ if res_present[RDT.MBA.value] > 0:
+ print("\t{", file=config)
+ print("\t\t.res_id = RDT_RESID_MBA,", file=config)
+ print("\t\t.msr_qos_cfg = MSR_IA32_MBA_QOS_CFG,", file=config)
+ print("\t\t.msr_base = MSR_IA32_MBA_MASK_BASE,", file=config)
+ print("\t\t.num_ins = {},".format(res_present[RDT.MBA.value]), file=config)
+ print("\t\t.ins_array = rdt_ins_mba,", file=config)
+ print("\t},", file=config)
+ print("};\n", file=config)
+
+ print("#endif\n", file=config)

+ return err_dic

def gen_single_data(data_lines, domain_str, config):
line_i = 0
diff --git a/misc/config_tools/library/common.py b/misc/config_tools/library/common.py
index 7ea12fa9d..d1ff0283e 100644
--- a/misc/config_tools/library/common.py
+++ b/misc/config_tools/library/common.py
@@ -532,6 +532,12 @@ def get_hv_item_tag(config_file, branch_tag, tag_str='', leaf_str=''):

return tmp

+def get_mask_list(cache_level, cache_id):
+ scenario_etree = lxml.etree.parse(SCENARIO_INFO_FILE)
+ mask_list = scenario_etree.xpath(f"//CACHE_ALLOCATION[CACHE_LEVEL = '{cache_level}' and CACHE_ID = '{int(cache_id,16)}']/POLICY/CLOS_MASK/text()")
+ result = list(set(mask_list))
+ result.sort()
+ return result

def undline_name(name):
"""
diff --git a/misc/config_tools/schema/config.xsd b/misc/config_tools/schema/config.xsd
index cf5b29c06..9d8ed1b7e 100644
--- a/misc/config_tools/schema/config.xsd
+++ b/misc/config_tools/schema/config.xsd
@@ -277,6 +277,11 @@ These settings can only be changed at build time.</xs:documentation>
Refer to :ref:`vuart_config` for detailed vUART settings.</xs:documentation>
</xs:annotation>
</xs:element>
+ <xs:element name="CACHE_REGION" type="CacheRegionType" minOccurs="0" maxOccurs="1">
+ <xs:annotation>
+ <xs:documentation>Specify the cache setting.</xs:documentation>
+ </xs:annotation>
+ </xs:element>
</xs:all>
</xs:complexType>

diff --git a/misc/config_tools/schema/types.xsd b/misc/config_tools/schema/types.xsd
index cd333a352..a67d717d8 100644
--- a/misc/config_tools/schema/types.xsd
+++ b/misc/config_tools/schema/types.xsd
@@ -299,20 +299,6 @@ RDT, setting this option to ``y`` is ignored.</xs:documentation>
<xs:documentation>Enable virtualization of the Cache Allocation Technology (CAT) feature in RDT. CAT enables you to allocate cache to VMs, providing isolation to avoid performance interference from other VMs.</xs:documentation>
</xs:annotation>
</xs:element>
- <xs:element name="CLOS_MASK" type="xs:string" minOccurs="0" maxOccurs="unbounded">
- <xs:annotation>
- <xs:documentation>Specify the cache capacity bitmask for the CLOS; only continuous '1' bits
-are allowed. The value will be ignored when hardware does not support RDT.
-This option takes effect only if :option:`hv.FEATURES.RDT.RDT_ENABLED` is set to ``y``.
-As :option:`vm.clos.vcpu_clos` specifies the index of the CLOS to be associated with the given vCPU,
-:option:`hv.FEATURES.RDT.CLOS_MASK` of that CLOS would impact the performance of the given vCPU.</xs:documentation>
- </xs:annotation>
- </xs:element>
- <xs:element name="MBA_DELAY" type="xs:string" minOccurs="0" maxOccurs="unbounded">
- <xs:annotation>
- <xs:documentation>Memory Bandwidth Allocation delay value.</xs:documentation>
- </xs:annotation>
- </xs:element>
</xs:sequence>
</xs:complexType>

@@ -326,4 +312,38 @@ As :option:`vm.clos.vcpu_clos` specifies the index of the CLOS to be associated
</xs:sequence>
</xs:complexType>

+<xs:simpleType name="CacheType">
+ <xs:annotation>
+ <xs:documentation>Option: Unified, Code, Data</xs:documentation>
+ </xs:annotation>
+ <xs:restriction base="xs:string">
+ <xs:enumeration value="Unified"/>
+ <xs:enumeration value="Code" />
+ <xs:enumeration value="Data" />
+ </xs:restriction>
+</xs:simpleType>
+
+<xs:complexType name="CachePolicyType">
+ <xs:sequence>
+ <xs:element name="VM" type="xs:string" />
+ <xs:element name="VCPU" type="xs:integer" />
+ <xs:element name="TYPE" type="CacheType" minOccurs="1"/>
+ <xs:element name="CLOS_MASK" type="HexFormat" />
+ </xs:sequence>
+</xs:complexType>
+
+<xs:complexType name="CacheAllocationType">
+ <xs:sequence>
+ <xs:element name="CACHE_ID" type="xs:integer"/>
+ <xs:element name="CACHE_LEVEL" type="xs:integer"/>
+ <xs:element name="POLICY" type="CachePolicyType" minOccurs="1" maxOccurs="unbounded"/>
+ </xs:sequence>
+</xs:complexType>
+
+<xs:complexType name="CacheRegionType">
+ <xs:sequence>
+ <xs:element name="CACHE_ALLOCATION" type="CacheAllocationType" minOccurs="1" maxOccurs="unbounded"/>
+ </xs:sequence>
+</xs:complexType>
+
</xs:schema>
diff --git a/misc/config_tools/static_allocators/clos.py b/misc/config_tools/static_allocators/clos.py
new file mode 100644
index 000000000..5f81ca819
--- /dev/null
+++ b/misc/config_tools/static_allocators/clos.py
@@ -0,0 +1,54 @@
+#!/usr/bin/env python3
+#
+# Copyright (C) 2022 Intel Corporation.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
+
+import sys, os
+sys.path.append(os.path.join(os.path.dirname(os.path.abspath(__file__)), '..', 'library'))
+import common, board_cfg_lib, lib.error, lib.lib
+import re
+from collections import defaultdict
+from itertools import combinations
+
+LEGACY_IRQ_MAX = 16
+
+def create_clos_node(etree, vm_id, index_list):
+ allocation_vm_node = common.get_node(f"/acrn-config/vm[@id = '{vm_id}']", etree)
+ if allocation_vm_node is None:
+ allocation_vm_node = common.append_node("/acrn-config/vm", None, etree, id = vm_id)
+ if common.get_node("./clos", allocation_vm_node) is None:
+ clos_node = common.append_node("./clos", None, allocation_vm_node)
+ for index in index_list:
+ common.append_node(f"./vcpu_clos", str(index), clos_node)
+
+def get_clos_index(cache_level, cache_id, clos_mask):
+ mask_list = common.get_mask_list(cache_level, cache_id)
+ idx = 0
+ for mask in mask_list:
+ idx += 1
+ if mask == clos_mask:
+ break
+ return idx
+
+def alloc_clos_index(board_etree, scenario_etree, allocation_etree):
+ native_ttys = lib.lib.get_native_ttys()
+ hv_debug_console = lib.lib.parse_hv_console(scenario_etree)
+
+ vm_node_list = scenario_etree.xpath("//vm")
+ for vm_node in vm_node_list:
+ vmname = common.get_node("./name/text()", vm_node)
+ allocation_list = scenario_etree.xpath(f"//CACHE_ALLOCATION[POLICY/VM = '{vmname}']")
+ for allocation in allocation_list:
+ index_list = []
+ cache_level = common.get_node("./CACHE_LEVEL/text()", allocation)
+ cache_id = common.get_node("./CACHE_ID/text()", allocation)
+ clos_mask_list = allocation.xpath(f".//POLICY[VM = '{vmname}']/CLOS_MASK/text()")
+ for clos_mask in clos_mask_list:
+ index = get_clos_index(cache_level, cache_id, clos_mask)
+ index_list.append(index)
+ create_clos_node(allocation_etree, common.get_node("./@id", vm_node), index_list)
+
+def fn(board_etree, scenario_etree, allocation_etree):
+ alloc_clos_index(board_etree, scenario_etree, allocation_etree)
diff --git a/misc/config_tools/xforms/lib.xsl b/misc/config_tools/xforms/lib.xsl
index 6b3631d8c..0e28f89f1 100644
--- a/misc/config_tools/xforms/lib.xsl
+++ b/misc/config_tools/xforms/lib.xsl
@@ -564,12 +564,12 @@

<!-- Board-specific functions-->
<func:function name="acrn:get-normalized-closinfo-rdt-res-str">
- <xsl:variable name="rdt_resource" select="translate(substring-before(substring-after(//CLOS_INFO, 'rdt resources supported:'), 'rdt resource clos max:'), $whitespaces, '')" />
+ <xsl:variable name="rdt_resource" select="acrn:string-join(//cache[capability/@id='CAT']/@level, ', ', 'L', '')" />
<func:result select="$rdt_resource" />
</func:function>

<func:function name="acrn:get-normalized-closinfo-rdt-clos-max-str">
- <xsl:variable name="rdt_res_clos_max" select="translate(substring-before(substring-after(//CLOS_INFO, 'rdt resource clos max:'), 'rdt resource mask max:'), $whitespaces, '')" />
+ <xsl:variable name="rdt_res_clos_max" select="acrn:string-join(//cache[capability/@id='CAT']/capability/clos_number, ', ', '', '')"/>
<func:result select="$rdt_res_clos_max" />
</func:function>

diff --git a/misc/config_tools/xforms/misc_cfg.h.xsl b/misc/config_tools/xforms/misc_cfg.h.xsl
index 39a7b7ae9..6d653cfa8 100644
--- a/misc/config_tools/xforms/misc_cfg.h.xsl
+++ b/misc/config_tools/xforms/misc_cfg.h.xsl
@@ -152,12 +152,6 @@
</xsl:otherwise>
</xsl:choose>
<xsl:if test="acrn:is-rdt-supported()">
- <xsl:for-each select="hv/FEATURES/RDT/MBA_DELAY">
- <xsl:value-of select="acrn:define(concat('MBA_MASK_', position() - 1), current(), 'U')" />
- </xsl:for-each>
- <xsl:for-each select="hv/FEATURES/RDT/CLOS_MASK">
- <xsl:value-of select="acrn:define(concat('CLOS_MASK_', position() - 1), current(), 'U')" />
- </xsl:for-each>
<xsl:value-of select="$endif" />
</xsl:if>
</xsl:template>
diff --git a/misc/config_tools/xforms/vm_configurations.c.xsl b/misc/config_tools/xforms/vm_configurations.c.xsl
index 6ba2360cb..f79d5d1d3 100644
--- a/misc/config_tools/xforms/vm_configurations.c.xsl
+++ b/misc/config_tools/xforms/vm_configurations.c.xsl
@@ -57,8 +57,9 @@
<xsl:value-of select="acrn:ifdef('CONFIG_RDT_ENABLED')" />

<xsl:for-each select="vm">
- <xsl:value-of select="concat('static uint16_t ', concat('vm', @id, '_vcpu_clos'), '[', count(clos/vcpu_clos), 'U] = {')" />
- <xsl:value-of select="acrn:string-join(clos/vcpu_clos, ', ', '', 'U')" />
+ <xsl:variable name="vm_id" select="@id" />
+ <xsl:value-of select="concat('static uint16_t ', concat('vm', @id, '_vcpu_clos'), '[', count(//allocation-data/acrn-config/vm[@id=$vm_id]/clos/vcpu_clos), 'U] = {')" />
+ <xsl:value-of select="acrn:string-join(//allocation-data/acrn-config/vm[@id=$vm_id]/clos/vcpu_clos, ', ', '', 'U')" />
<xsl:text>};</xsl:text>
<xsl:value-of select="$newline" />
</xsl:for-each>
@@ -166,18 +167,17 @@
<xsl:value-of select="acrn:ifdef('CONFIG_RDT_ENABLED')" />
<xsl:value-of select="acrn:initializer('pclosids', concat('vm', ../@id, '_vcpu_clos'))" />

- <xsl:value-of select="acrn:initializer('num_pclosids', concat(count(vcpu_clos), 'U'))" />
-
+ <xsl:variable name="vm_id" select="../@id" />
+ <xsl:value-of select="acrn:initializer('num_pclosids', concat(count(//allocation-data/acrn-config/vm[@id=$vm_id]/clos/vcpu_clos), 'U'))" />
<xsl:if test="acrn:is-vcat-enabled() and ../virtual_cat_support[text() = 'y']">
<xsl:variable name="rdt_res_str" select="acrn:get-normalized-closinfo-rdt-res-str()" />
- <xsl:variable name="closid" select="vcpu_clos[1]" />

<xsl:if test="contains($rdt_res_str, 'L2')">
- <xsl:value-of select="acrn:initializer('max_l2_pcbm', concat(../../hv/FEATURES/RDT/CLOS_MASK[$closid + 1], 'U'))" />
+ <xsl:value-of select="acrn:initializer('max_l2_pcbm', concat(math:max(//allocation-data/acrn-config/vm[@id=$vm_id]/clos/vcpu_clos), 'U'))" />
</xsl:if>

<xsl:if test="contains($rdt_res_str, 'L3')">
- <xsl:value-of select="acrn:initializer('max_l3_pcbm', concat(../../hv/FEATURES/RDT/CLOS_MASK[$closid + 1], 'U'))" />
+ <xsl:value-of select="acrn:initializer('max_l3_pcbm', concat(math:max(//allocation-data/acrn-config/vm[@id=$vm_id]/clos/vcpu_clos), 'U'))" />
</xsl:if>
</xsl:if>

--
2.17.1

Join acrn-dev@lists.projectacrn.org to automatically receive all group messages.